1Ideal Diode
1.1Problem
A common mistake is to connect the power wires of a board the wrong way, which powers the system with a negative voltage instead of the intended positive voltage.The simplest protection against reverse voltage is a diode, but you are going to lose a lot of power due to the forward voltage.
1.2Solution
Instead of a simple diode, an ideal diode can be used to minimize conduction losses.2Low Voltage Ideal Diode
The idea is to use a MOS switch instead of a simple diode. A simple bias circuit ensures that when input voltage is positive, the MOS switches ON and the forward diode is replaced by the ON resistance of the MOS sharply reducing forward losses.
Illustration 1: Low Voltage Ideal Diode Schematics
M_FW is the MOS that takes the place of the diode. A P-MOS with the source facing toward the output is the simplest solution. Putting the source on the other side means the source drain diode would let negative voltages through. Using a N-MOS would require a charge pump to generate the required gate voltage.
RPU makes sure M_FW is OFF in the default state.
M_INV is a signal transistor and what makes the bias network works. When VIN>0, M_INV switches ON dropping the gate of M_FW to 0V which is its ON condition.
RG is needed just to protect the gate of M_INV. There can be funky behaviour when there are harmonics at low voltage on the input, CF is there just to make a low pass filter and is optional.
When VIN<0 the source drain diode of M_FW is OFF and M_INV is OFF as well, meaning the output is disconnected from the input.
Illustration 2: Low Voltage Ideal Diode Waveform
The limitation of this circuit is that the gate-source breakdown voltage limits the maximum VIN to about 18V with typical MOS transistors.
3High Voltage Ideal Diode
If higher voltages are required, like 24V automotive, a different circuit is needed to protect the gates of the MOS switches.3.1Zener
The simplest solution is to add a zener to the gate to protect it from big drive voltages.
Illustration 3: High Voltage Ideal Diode Schematics
Adding DZ1 means RS1 has to be added to limit the current flowing in M1 when DZ1 is active.
Having RS1 too low would limit response time and prevent the zener to activate. RS1 must guarantee the minimum zener current when the zener is supposed to switch on.
Another thing to consider is that now RS1 and RPU1 now form a voltage divider, meaning the gate voltage is reduced. This delay the switch on, but also lowers the maximum VGS. Depending on the application you might get away with just using resistors without zener diodes.
Now, this circuit has two MOS switches an the second MOS must also be protected by its own zener DZ2 with its own resistence to limit the zener current when DZ2 is on. The same considerations made for RS1 apply for RG1.
Illustration 4: High Voltage Ideal Diode Waveform
As can be seen fro the waveforms, the output behaves correctly, but this time the gate voltages are clipped to the zener diodes own zener voltage, making sure no component dies.
3.2BJT Version
One might think of replacing some or all of the MOS switches with BJT switches to avoid the gate breakdown voltage.The original problem was that the diode had a forward junction voltage in series with the power line. Using a BJT in place of M_FW replaces a Vgamma with a VCEsat, not a big step up.
Bigger problem still is that BJT re vulnerable to reverse voltages on the BC junctions, typically limited to -5V before breakdown. Such conditions happens in this circuit when input voltage is negative.
In order for BJT to be used, a diode and a resistor have to be used to protect the BC junction from reverse bias. Not a big step up from using a zener, but doable.
Illustration 5: High Voltage Ideal Diode BJT Schematics
Same considerations apply for RG1 and RS1 as the previous circuit.
Illustration 6: High Voltage
Ideal Diode BJT Waveform
Waveforms are mostly the same as before, except the BE junction is
clipped to about 1V of dynamic.3.3Current Mirror
Rather than protecting the base/gate of the lower switch, you can think about using a different bias circuit.If you expose the emitter/source, the problem doesn't go away, but if you expose the collector/drain to the input voltage, you are keeping the GS/BE protected. Doing so requires an additional switch, forming a current mirror.
The Raspberry Pi uses a similar this approach, but it's not enough to protect the BE or the GS on its own. If you want to protect them from high voltages, you need a diode for each BJT and a zener/voltage divider for each power MOS.
Illustration 7: Low Side BJT Current Mirror
4External Control
Arrived to this point, since you have a voltage controlled diode you might think that by adding a control signal you can manually disconnect the power, achieving both reverse voltage protection and power disconnect functionality from the same MOS:It doesn't work. If you disable the MOS with a positive input, its embedded diode is still there, and you are left with a diode instead of an ideal diode.
You cannot put the embedded power diode in reverse because it would let negative voltages through. You can only add another switch, which needs to be flipped in order to block positive voltages by default.
Illustration 8: Controlled Ideal Diode Schematics
M_EN is controlled by logic and can be used to disable the ideal diode. In this configuration, a positive enable will enable the diode, meaning the logic must be powered already.
Illustration 9: Controlled Ideal Diode Waveforms
The control logic must be independent from this protection anyway, or disabling it would power down the logic and that would disable the protection, leading to an oscillatory behaviour. This circuit is meant to protect power electronics independently from the logic in a controlled way.
5Improvements
I felt one could do better with the protection of the input MOS, and the solution was simple enough.5.1Remove one component
You can remove the auxiliary MOS altogether.The reason this works, is because the forward diode let voltage through allowing the divider RPU RPD to establish a VGS and switch the forward MOS on.
The waveforms are the same as previous circuits.
Illustration 11: Simplified Ideal Diode Waveforms
Again, the zener can be omitted from the circuit depending on the voltage divider and response time required, but at least with this circuit you just need one zener.
5.2PTC
Since you went through the trouble of using an ideal diode, you probably want a fuse as well for good measure. A PTC resistor is convenient because it reset itself when it cools down.One idea you might have, is to put the fuse in a spot where it can lower the GS voltage as it gets hotter, improving the response of the fuse, and leaving the forward MOS bear some of the heat as it get less switched on.
It works. When the PTC is tripped by heat, its resistance increases, robbing voltage to VGS and lowering current even more.
Illustration 13: Ideal Diode with PTC Waveforms
There is one caveat, as M_FW takes some of the burden, PTC dissipates less heat, which might result in increased blocking current. Worst case scenario, the PTC trips faster, but settles at an higher overall blocking current.
5.3Lower Startup Threshold
Having added a PTC and removed one component, one might thing of trying to lower the startup voltage of the ideal diode by adding a switch as pull down network, but sharing the protection of the forward MOS.
Illustration 14: Low Activation Threshold Ideal Diode with PTC Schematics
It works. The low side MOS has to be an N type with SD replacing the pull down network of the forward switch. Now, the pull down resistor has just the job of bias and current limiting for the zener, and can be placed either at the source or at the drain of M1.
Putting it downstream is the obvious choice, and it behave as one might think.
If you put RPD2 upstream, something magic happen. Now, RPD2 forms a positive feedback loop with M1 in which more current, means more VGS which means more current.
Thanks to this effect, you can remove RPD1 from Gpwr to ground, because the leakage voltage of M1 is enough to get amplified into a fully switched on pull down MOS.
Illustration 15: Low Activation Threshold Ideal Diode with PTC Waveform
With this MOS, the threshold voltage at which the ideal diode switches on is lowered from 3.94V to 1.6V, this circuit retains all the protections and feature of the previous optimized circuit.
5.4Enable
The next idea is to add now an enable signal.
Illustration 16: Low Activation Threshold Ideal Diode with PTC with Enable Schematics
An enable MOS is added in series to disable the ideal diode. The protection works for all switches.
Illustration 17: Low Activation Threshold Ideal Diode with PTC And Enable Waveform
An idea can be to draw the logic power from the FW node, this way the low power logic can be powered even while not taking advantage of the saving of the ideal diode.
When the enable signal is sent, the power electronics is powered and the ideal diode activates
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